1. Field of the Invention
The present invention relates to a semiconductor device having a so-called W-CSP (Wafer Level Chip Size Package) and a fabrication method thereof.
2. Description of the Related Art
A semiconductor chip package, of which size is almost equal to that of a semiconductor chip diced from a semiconductor wafer, is generally called a CSP (Chip Size Package). A CSP created by packaging a semiconductor chip having predetermined functions formed in a semiconductor wafer, in semiconductor wafer status, and then dicing it into an individual chip, in particular is called a W-CSP.
In such CSPs, an external terminal is a columnar electrode (post-like electrode) or a combination of a columnar electrode and a solder ball. The solder ball is connected to the top face of the columnar electrode.
If the electrode terminal is a columnar electrode having a solder ball thereon, an alloy portion is inevitably formed by the reaction of the metal materials of the electrode (post) and solder ball when the solder ball is bonded on top of the electrode. This alloy portion is formed in several tens μm in height, along the bonding face (interface) between the columnar electrode and solder ball.
In this alloy portion, the strength (bonding strength) of the bonding face against stress becomes somewhat weaker. In some cases, peeling and cracking are generated in the alloy portion (bonding face) in the temperature cycle test after bonding, for example, and the solder ball falls from the columnar electrode.
Japanese Patent Application Kokai (Laid-Open) No. 2000-353766 discloses a CSP having column electrodes and solder balls on the top faces thereof and a fabrication method for such CSP. Japanese Patent Application Kokai No. 2000-353766 provides a CSP having high connection reliability and a fabrication method thereof. Specifically, the bonding strength is improved by exposing the entire top face and a part of the lateral wall of the columnar electrode from the sealing resin, and covering a part of the exposed lateral wall with a solder ball.
The number of external terminals (solder balls) formed on the packaging face of the CSP, that is the number of pins, is decided by the size of the packaging face and the pitch of the external terminals (distance between two adjacent external terminals). As the size of the packaging face increases or as the pitch of the external terminals decreases, the number of pins on the packaging face increases. An increase in the number of pins on the packaging face is called an “increase of pins” here.
In order to increase pins by decreasing the pitch of the external terminals, each external terminal, that is the diameters of the columnar electrode and solder ball, should be downsized.
In Japanese Patent Application Kokai No. 2000-353766, the area of the bonding face of the columnar electrode and solder ball is increased to improve the bonding strength thereof, but the diameter of the solder ball increases. This makes it difficult to implement an increase of pins.